Research > Faculty Projects

Achieving High-Performance Reconfigurable Computing in Commodity Devices

Principal Investigator
Scott Hauck

Sponsor(s)
National Science Foundation (NSF)

Award Period
11/01/2004 - 10/31/2008

Abstract
Although FPGAs can provide high performance for a wide range of applications, their achieved clock cycles are typically 5x-10x slower than other circuits. This is due to the programmable nature of the underlying hardware, as well as the limitations in the input circuits. It is clear that if the clock periods could be significantly improved there could be a major increase in throughput for these systems. While some efforts have sought to increase throughput via custom architectures, these systems are often limited to very restrictive circuit styles, and often cannot handle general-purpose circuits as well. This means such devices will not become mainstream, and the loss of commodity processing significantly increases costs and reduces access to the most advanced fabrication processes.

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